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Automated Least-Significant Bit Datapath Optimization for FPGAs
Napa, California April 20-April 23
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2004.1812th Annual IEEE Symposium on Field-P ...
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Mark L. Chang, University of Washington, Seattle
Scott Hauck, University of Washington, Seattle
In this paper we present a method for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research [Pr?cis: A design-time precision analysis tool] which presented a methodology for optimizing for dynamic range-the most significant bit position. In this work, we present an automated optimization technique for the least-significant bit position of circuit datapaths. We present results describing the effectiveness of our methods on typical signal and image processing kernels.
Citation:
Mark L. Chang, Scott Hauck, "Automated Least-Significant Bit Datapath Optimization for FPGAs," fccm, pp.59-67, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'04), 2004
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