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Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs
Napa, California April 20-April 23
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2004.5912th Annual IEEE Symposium on Field-P ...
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Altaf Abdul Gaffar, Imperial College, London, UK
Oskar Mencer, Imperial College, London, UK
Wayne Luk, Imperial College, London, UK
Peter Y. K. Cheung, Imperial College, London, UK
This paper presents a method that offers a uniform treatment for bit-width optimisation of both fixed-point and floating-point designs. Our work utilises automatic differentiation to compute the sensitivities of outputs to the bit-width of the various operands in the design. This sensitivity analysis enables us to explore and compare fixed-point and floating-point implementation for a particular design. As a result we can automate the selection of the optimal number representation for each variable in a design to optimize area and performance. We implement our method in the BitSize tool targeting reconfigurable architectures, which takes user-defined constraints to direct the optimisation procedure. We illustrate our approach using applications such as ray-tracing and function approximation.
Citation:
Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung, "Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs," fccm, pp.79-88, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'04), 2004
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