As synthesis tools become more advanced and reliable, the entry point for the designer in the design process is moving towards higher levels of specification. In this paper, the feasibility of using VHDL language to model communication protocols is examined, and a modeling methodology for such systems using VHDL is presented. We demonstrate our methodology on the transport protocol ISO/CCITT class O. The resulting model is an appropriate model for the high level design. The paper concludes with a discussion of the importance and future trends in modeling communication protocols using HDLs.
Index Terms:
transport protocols; VLSI; hardware description languages; ISO standards; high level synthesis; communication protocols; VHDL; transport protocol; ISO/CCITT class O; high level design; hardware implementations; VLSI
Citation:
A. Assi, B. Kaminska, "Modeling of communication protocols in VHDL," glsvlsi, pp.168, Fifth Great Lakes Symposium on VLSI (GLSVLSI'95), 1995