In this paper, we address the problem of hardware interface design in a Codesign approach for real time Digital Signal Processing (DSP) applications. We focus on the allocation problem of necessary storage components needed for data communication between hardware-software components. First, we present a modeling style for I/O data exchanged between both components and we describe our generic model of the hardware interface. Second, we describe a formal technique to the necessary storage components allocation. Our design strategy starts from the hardware I/O transfer sequences computed by a high level synthesis tool, like GAUT (E. Martin et al., 1993). It incorporates some interface specification (I/O transfer order, timing constraints) obtained by any cosynthesis tool (such as that developed by P. H. Chon et al., 1995). The proposed allocation procedure assigns for each I/O data a time interval at which its transfer could occur. The results presented are based on FFT algorithms implemented on ASICs.