Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes

Lafayette, Louisiana February 19-February 24

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/GLSV.1998.665201

Great Lakes Symposium on VLSI '98

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Mayukh Bhattacharya Articles by Pinaki Mazumder

	ASCII Text	x
	Mayukh Bhattacharya, Pinaki Mazumder, "Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes," Great Lakes Symposium on VLSI, pp. 65, Great Lakes Symposium on VLSI '98, 1998.

	BibTex	x
	@article{ 10.1109/GLSV.1998.665201, author = {Mayukh Bhattacharya and Pinaki Mazumder}, title = {Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes}, journal ={Great Lakes Symposium on VLSI}, volume = {0}, year = {1998}, issn = {1066-1395}, pages = {65}, doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1998.665201}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Great Lakes Symposium on VLSI TI - Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes SN - 1066-1395 SP EP A1 - Mayukh Bhattacharya, A1 - Pinaki Mazumder, PY - 1998 KW - Quantum devices KW - Resonant Tunneling Diode KW - Digital circuits KW - Threshold gate KW - Noise margin VL - 0 JA - Great Lakes Symposium on VLSI ER -

Mayukh Bhattacharya, The University of Michigan, Ann Arbor

Pinaki Mazumder, The University of Michigan, Ann Arbor

Threshold gates consisting of RTDs in conjunction with HBTs or CHFETs or MOS transistors can form extremely compact, ultrafast, digital logic alternatives. The resonant tunneling phenomenon causes these circuits to exhibit super-high-speed switching capabilities.Additionally, by virtue of being threshold logic gates, they are guaranteed to be more compact than traditional digital logic circuits while achieving the same functionality. However, reliable logic design with these gates will need a thorough understanding of their noise performance and power dissipation among other things. In this paper, we present an analytical study of the noise performance of these threshold gates supplemented by computer simulation results, with the objective of obtaining reliable circuit design guidelines.

Index Terms:

Quantum devices, Resonant Tunneling Diode, Digital circuits, Threshold gate, Noise margin

Citation:

Mayukh Bhattacharya, Pinaki Mazumder, "Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes," glsvlsi, pp.65, Great Lakes Symposium on VLSI '98, 1998

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.