On Path Delay Fault Testing of Multiplexer

On Path Delay Fault Testing of Multiplexer - Based Shifters

Ann Arbor, Michigan March 04-March 06

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http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757368

Ninth Great Lakes Symposium on VLSI

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	ASCII Text	x
	H.T. Vergos, D. Nikolos, Y. Tsiatouhas, Th. Haniotakis, M. Nicolaidis, "On Path Delay Fault Testing of Multiplexer - Based Shifters," Great Lakes Symposium on VLSI, pp. 20, Ninth Great Lakes Symposium on VLSI, 1999.

	BibTex	x
	@article{ 10.1109/GLSV.1999.757368, author = {H.T. Vergos and D. Nikolos and Y. Tsiatouhas and Th. Haniotakis and M. Nicolaidis}, title = {On Path Delay Fault Testing of Multiplexer - Based Shifters}, journal ={Great Lakes Symposium on VLSI}, volume = {0}, year = {1999}, issn = {1066-1395}, pages = {20}, doi = {http://doi.ieeecomputersociety.org/10.1109/GLSV.1999.757368}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Great Lakes Symposium on VLSI TI - On Path Delay Fault Testing of Multiplexer - Based Shifters SN - 1066-1395 SP EP A1 - H.T. Vergos, A1 - D. Nikolos, A1 - Y. Tsiatouhas, A1 - Th. Haniotakis, A1 - M. Nicolaidis, PY - 1999 VL - 0 JA - Great Lakes Symposium on VLSI ER -

H.T. Vergos, University of Patras and Computer Technology Institute

D. Nikolos, University of Patras and Computer Technology Institute

Y. Tsiatouhas, ISD S.A

Th. Haniotakis, ISD S.A

M. Nicolaidis, TIMA

In this paper we present a method for path delay fault testing of multiplexer-based shifters. We show that many paths of the shifter are non-robustly testable and we give a path selection method so as all the selected paths to be robustly testable by 20 * log2n + 2 test-vector pairs, where n is the length of the shifter. The propagation delay along all other paths is a function of the delays along the selected paths.

Citation:

H.T. Vergos, D. Nikolos, Y. Tsiatouhas, Th. Haniotakis, M. Nicolaidis, "On Path Delay Fault Testing of Multiplexer - Based Shifters," glsvlsi, pp.20, Ninth Great Lakes Symposium on VLSI, 1999

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