In order to show the feasibility of a fine-grain dataflow computation scheme, we are implementing a fine-grain dataflow language on off-the-shelf computers, using a fine-grain multithread approach. Fine grain parallel data-structures such as I-structures pro vide high level abstraction to easily write programs with potentially high parallelism. The results of preliminary experiments on a distributed memory parallel ma chine indicate that the performance inefficiency related to fine-grain parallel data-structures in the naive implementation is mainly caused by the calculation of the local address for distributed data, and the frequent fine grain data access using message passing. In order to re duce the addressing overhead, we introduce a two-level table addressing technique. We employ a caching mechanism and a grouping mechanism for the fine-grain data access. The preliminary performance evaluation results indicate that these techniques are effective to improve the performance.