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Trace-Level Speculative Multithreaded Architecture
Freiburg, Germany September 16-September 18
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICCD.2002.11068022002 IEEE International Conference on ...
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Carlos Molina, Universitat Rovira i Virgili
Antonio González, Universitat Polit?cnica de Catalunya
Jordi Tubella, Universitat Polit?cnica de Catalunya

This paper presents a novel microarchitecture to exploit trace-level speculation by means of two threads working cooperatively in a speculative and non-speculative way respectively. The architecture presents two main benefits: (a) no significant penalties are introduced in presence of misspeculation and (b) any type of trace predictor can work together with this proposal. In this way, aggressive trace predictors can be incorporated since misspeculations do not introduce significant penalties.

We describe in detail TSMA (Trace-Level Speculative Multithreaded Architecture) and present some initial results to show the benefits of this proposal. We show how simple trace predictors achieve significant speed-up in the majority of the cases. Concretely, results of a simple trace speculation mechanism results in an average speed-up of 16%.

Citation:
Carlos Molina, Antonio González, Jordi Tubella, "Trace-Level Speculative Multithreaded Architecture," iccd, pp.402, 2002 IEEE International Conference on Computer Design (ICCD'02), 2002
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