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Physical Design of the "2.5D" Stacked System
San Jose, California October 13-October 15
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICCD.2003.12408972003 IEEE International Conference on ...
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Yangdong (Steven) Deng, Carnegie Mellon University, Pittsburgh, PA
Wojciech Maly, Carnegie Mellon University, Pittsburgh, PA
Excessive on-chip wire length and fast increasing fabrication cost have been the main factors impairing the effectiveness of monolithic System-on-Chip. This paper investigates a die stacking based system integration strategy (2.5D system integration) to address these problems. The new scheme is design-tools-enabled rather than technology-driven. We developed a layout design framework, which is able to floorplan, place and route a VLSI design into stacked chips. Our results show that this new scheme has a potential to outperform its monolithic equivalent.
Citation:
Yangdong (Steven) Deng, Wojciech Maly, "Physical Design of the "2.5D" Stacked System," iccd, pp.211, 2003 IEEE International Conference on Computer Design (ICCD'03), 2003
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