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Functional Illinois Scan Design at RTL
San Jose, CA October 11-October 13
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICCD.2004.13479032004 IEEE International Conference on ...
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Ho Fai Ko, Nicola Nicolici, "Functional Illinois Scan Design at RTL," Computer Design, International Conference on, pp. 78-81, 2004 IEEE International Conference on Computer Design (ICCD'04), 2004.
 
 
BibTex
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@article{ 10.1109/ICCD.2004.1347903,
author = {Ho Fai Ko and Nicola Nicolici},
title = {Functional Illinois Scan Design at RTL},
journal ={Computer Design, International Conference on},
volume = {0},
year = {2004},
issn = {1063-6404},
pages = {78-81},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICCD.2004.1347903},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Computer Design, International Conference on
TI - Functional Illinois Scan Design at RTL
SN - 1063-6404
SP78
EP81
A1 - Ho Fai Ko,
A1 - Nicola Nicolici,
PY - 2004
KW - null
VL - 0
JA - Computer Design, International Conference on
ER -
 
Ho Fai Ko, McMaster University, Hamilton, ON, Canada
Nicola Nicolici, McMaster University, Hamilton, ON, Canada
This paper shows that by creating functional scan chains at the register-transfer level (RTL), not only the timing of the circuit can be improved, but also the test data compression provided from the Illinois scan architecture is similar or even better than the gate level counterpart.
Citation:
Ho Fai Ko, Nicola Nicolici, "Functional Illinois Scan Design at RTL," iccd, pp.78-81, 2004 IEEE International Conference on Computer Design (ICCD'04), 2004
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