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Discrete event process controller synthesis using VDM/sup ++/
Ft. Lauderdale, Florida November 06-November 10
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICECCS.1995.479318First IEEE International Conference o ...
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K. Lano, Dept. of Comput., Imperial Coll. of Sci., Technol. & Med., London, UK
S. Goldsack, Dept. of Comput., Imperial Coll. of Sci., Technol. & Med., London, UK
The paper describes approaches to the specification and design of a controller for a gas burner system using VDM/sup ++/. It defines a systematic method for interpreting declarative requirements statements in real-time temporal logic, and for the construction of abstract and concrete VDM/sup ++/ specifications which implement the formalised requirements. Timing analysis is also addressed. The central contribution of the paper is a primarily mechanical process of refinement from abstract declarative specifications of a control problem to implemented controllers in Ada95.
Index Terms:
discrete event systems; formal specification; specification languages; real-time systems; temporal logic; timing; programmable controllers; object-oriented languages; parallel languages; combustion; ignition; control system CAD; process control; control system synthesis; Vienna development method; heat systems; discrete event process controller synthesis; VDM/sup ++/; controller specification; controller design; gas burner system; systematic method; declarative requirement statements; real-time temporal logic; abstract VDM/sup ++/ specifications; concrete VDM/sup ++/ specifications; formalised requirements; timing analysis; refinement process; Ada95
Citation:
K. Lano, S. Goldsack, "Discrete event process controller synthesis using VDM/sup ++/," iceccs, pp.129, First IEEE International Conference on Engineering of Complex Computer Systems (ICECCS'95), 1995
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