The paper describes a specific method for designing self-checking checkers for m-out-of-n codes. The method is oriented to the Field Programmable Gate Arrays technology and is based on decomposing the sum-of-minterms corresponding to an m-out-of-n code. The self-testing property of the proposed checker is proven for a set of multiple stuck-at faults at input and output poles of a Logic Cell. An estimated complexity of obtained m-out-of-n checker demonstrates high efficiency of the proposed method.
Citation:
A. Matrosova, V. Ostrovsky, I. Levin, K. Nikitin, "Designing FPGA based Self-Testing Checkers for m-out-of-n Codes," iolts, pp.49, 9th IEEE International On-Line Testing Symposium, 2003