loading...
BIST-Based Delay-Fault Testing in FPGAs
Isle of Bendor, France July 08-July 10
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/OLT.2002.1030195Proceedings of The Eighth IEEE Intern ...
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Miron Abramovici, Agere Systems
Charles Stroud, University of North Carolina at Charlotte
We present the first delay-fault testing approach for FPGAs, applicable both for manufacturing and for on-line testing. Our approach is based on BIST, is comprehensive, and does not require expensive ATE. We have successfully implemented this BIST approach on the ORCA 2C series FPGA.
Citation:
Miron Abramovici, Charles Stroud, "BIST-Based Delay-Fault Testing in FPGAs," ioltw, pp.131, Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02), 2002
Usage of this product signifies your acceptance of the Terms of Use.