Based on strategies for on-line error detection in data and control path structures in simple microprocessors, this approach proposes techniques for the control- and component-error detection in high-performance processors. Detected errors are classified on-line with respect to their impact on the control and data flow. A compensation of detected errors is performed by micro rollback with different rollback distances according to predefined priority classes of error handling.
Citation:
C. Galke, M. Pflanz, H. T. Vierhaus, "On-line Detection and Compensation of Transient Errors in Processor Pipeline-Structures," ioltw, pp.178, Proceedings of The Eighth IEEE International On-Line Testing Workshop (IOLTW'02), 2002