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A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices
University of Toronto, Toronto, Canada May 19-May 22
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISMVL.2004.131996534th International Symposium on Multi ...
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Hiromitsu Kimura, Tohoku University
Kostas Pagiamtzis, University of Toronto
Ali Sheikholeslami, University of Toronto
Takahiro Hanyu, Tohoku University
This paper presents four-valued magnetoresistive RAM (MRAM) storage cells using one access transistor and two binary magnetic tunnel junction (MTJ) devices with the MTJ devices either in series or in parallel. We present a comparative study of the two cells in terms of their area and power benefits over the binary MRAM, all using the same conventional MRAM process.
Citation:
Hiromitsu Kimura, Kostas Pagiamtzis, Ali Sheikholeslami, Takahiro Hanyu, "A Study of Multiple-Valued Magnetoresistive RAM (MRAM) Using Binary MTJ Devices," ismvl, pp.340-345, 34th International Symposium on Multiple-Valued Logic (ISMVL'04), 2004
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