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High-Level Simulation of Embedded Systems: Experiences from the FIT Project
Vienna, Austria May 12-May 14
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISORC.2004.1300363Seventh IEEE International Symposium ...
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Přemysl Brada, University of West Bohemia
Petr Grillinger, University of West Bohemia
Stanislav Racek, University of West Bohemia
This paper summarizes the experiences gained from the EU project FIT which was aimed at the verification of TTP/C protocol. Several fault injection techniques have been successfully applied during the project, but we will focus mainly on the "high level simulation" approach. The key contribution of the paper is a summary of the lessons learned from our experiences with functional verification of embedded systems, using the discrete-time simulation method.
Citation:
Přemysl Brada, Petr Grillinger, Stanislav Racek, "High-Level Simulation of Embedded Systems: Experiences from the FIT Project," isorc, pp.245-248, Seventh IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'04), 2004
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