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Sparse Networks Tolerating Random Faults
Fremantle, Australia June 23-June 25
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISPAN.1999.7789261999 International Symposium on Paral ...
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Toshinori Yamada, Tokyo Institute of Technology
Shuichi Ueno, Tokyo Institute of Technology
This paper proposes a general method to construct a fault-tolerant network G* for any network G with N processors such that G* has O(N) processors and contains a fault-free isomorphic copy of G with high probability even if processors fail independently with constant probability. Based on the construction, we also show that we can construct such fault-tolerant networks with O(N) processors and O(M log N) communication links for a circulant network, hypercube, de Bruijn network, shuffle-exchange network, and cube-connected-cycles with N processors and M communication links.
Index Terms:
Circulant Graphs, Hypercubic Graphs, Random-Fault-Tolerant Graphs, Multi-processor Systems, Interconnection Networks
Citation:
Toshinori Yamada, Shuichi Ueno, "Sparse Networks Tolerating Random Faults," ispan, pp.114, 1999 International Symposium on Parallel Architectures, Algorithms and Networks (ISPAN '99), 1999
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