Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells

San Jose, California March 20-March 22

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/ISQED.2000.838875

First International Symposium on Qual ...

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by T. Bautista Articles by A. Núñez

	ASCII Text	x
	T. Bautista, A. Núñez, "Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells," Quality Electronic Design, International Symposium on, pp. 217, First International Symposium on Quality of Electronic Design, 2000.

	BibTex	x
	@article{ 10.1109/ISQED.2000.838875, author = {T. Bautista and A. Núñez}, title = {Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells}, journal ={Quality Electronic Design, International Symposium on}, volume = {0}, year = {2000}, isbn = {0-7695-0525-2}, pages = {217}, doi = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2000.838875}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Quality Electronic Design, International Symposium on TI - Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells SN - 0-7695-0525-2 SP EP A1 - T. Bautista, A1 - A. Núñez, PY - 2000 VL - 0 JA - Quality Electronic Design, International Symposium on ER -

T. Bautista

A. Núñez

A complete quantitative evaluation of the quality of more than one hundred implementations of SPARC processor core and its related circuitry, synthesized from VHDL descriptions, is presented in this paper as a demonstration example for selecting benchmark circuits, synthesis experiments with different tools and technologies, and performance metrics, for evaluating the quality of IP blocks and megacells. The methodology of the experiments conducted for these circuits can be applied to a wide range of other benchmark candidate circuits. The synthesis experiments are designed to fully explore the synthesis space and to analyze the impact of every synthesis step on the final design quality obtained.

Citation:

T. Bautista, A. Núñez, "Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells," isqed, pp.217, First International Symposium on Quality of Electronic Design, 2000

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.