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Fourth International Symposium on Quality Electronic Design
ISBN: 0-7695-1881-8
San Jose, California March 24-March 26
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pp. 3
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ISQED TUTORIALS
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Tutorial Track A: Design for Yield Optimization and Test
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pp. 7
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Tutorial Track B: Design for Manufacturing and Yield
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pp. 8
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pp. 8
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pp. 9
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pp. 9
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Tutorial Track C: IC and Package Co-Design
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pp. 10
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pp. 11
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pp. 11
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pp. 11
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Tutorial Track D: Design for Reliability
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pp. 12
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pp. 13
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pp. 15
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Plenary Session I
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pp. 25
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Session 1A: Reliability and Design in Deep Submicron Technologies
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Amir H. Ajami, University of Southern California
Kaustav Banerjee, University of California at Santa Barbara
Amit Mehrotra, University of Illinois at Urbana-Champaign
Massoud Pedram, University of Southern California
pp. 35
Session 1B: Reducing Leakage Currents in VLSI Circuits
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Afshin Abdollahi, University of Southern California
Farzan Fallah, Fujitsu Laboratories of America
Massoud Pedram, University of Southern California
pp. 49
Session 1C: SoC Methodology
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Gustavo M. Callicó, Applied Microelectronics Research Institute
Antonio Núñez, Applied Microelectronics Research Institute
Rafael Peset Llopis, Philips Consumers Electronics
Ramanathan Sethuraman, Philips Research Laboratories Eindhoven
pp. 79
Session 2A: Testing of SoCs
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Yu Huang, Mentor Graphics Corporation
Wu-Tung Cheng, Mentor Graphics Corporation
Chien-Chung Tsai, Mentor Graphics Corporation
Nilanjan Mukherjee, Mentor Graphics Corporation
Sudhakar M. Reddy, University of Iowa
pp. 99
Session 2B: Design for Manufacturability and Quality
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F. Duan, LSI Logic Corporation
R. Castagnetti, LSI Logic Corporation
R. Venkatraman, LSI Logic Corporation
O. Kobozeva, LSI Logic Corporation
S. Ramesh, LSI Logic Corporation
pp. 119
Session 2C: Invited Papers Session-Design Considerations in Advanced Technology
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C. T. Chuang, IBM T. J. Watson Research Center
R. V. Joshi, IBM T. J. Watson Research Center
R. Puri, IBM T. J. Watson Research Center
K. Kim, IBM T. J. Watson Research Center
pp. 153
Nagaraj NS, Texas Instruments Inc.
Tom Bonifield, Texas Instruments Inc.
Abha Singh, Texas Instruments Inc.
Frank Cano, Texas Instruments Inc.
Usha Narasimha, Texas Instruments Inc.
Mak Kulkarni, Texas Instruments Inc.
Poras Balsara, University of Texas at Dallas
Cyrus Cantrell, University of Texas at Dallas
pp. 163
Session 3A: Interconnect and Substrate Noise
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Murat R. Becer, Motorola Inc.
David Blaauw, Univ. of Michigan Ann Arbor
Ilan Algor, Motorola Inc.
Rajendran Panda, Motorola Inc.
Chanhee Oh, Motorola Inc.
Vladimir Zolotov, Motorola Inc.
Ibrahim N. Hajj, Univ. of Illinois Urbana-Champaign
pp. 171
Xiaoliang Bai, University of California, San Diego
Rajit Chandra, University of California, San Diego
Sujit Dey, University of California, San Diego
P. V. Srinivas, University of California, San Diego
pp. 177
Chung-Kuan Tsai, University of California, Santa Barbara
Malgorzata Marek-Sadowska, University of California, Santa Barbara
pp. 189
Session 3B: Impact of New Standards for Design Data Modeling and Manufacturing Interface
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Session 3C: Package-Design Interface Challenges
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Michael Wang, University of California, Santa Cruz
Katsuharu Suzuki, University of California, Santa Cruz
Wayne Dai, University of California, Santa Cruz
pp. 229
Ming-Dou Ker, National Chiao-Tung University
Jeng-Jie Peng, Industrial Technology Research Institute
Hsin-Chin Jiang, Industrial Technology Research Institute
pp. 241
Evening Panel Discussion: IC and Package Co-Design: Challenge or Dream?
Soroush Abbaspour, University of Southern California
Massoud Pedram, University of Southern California
Payam Heydari, University of California, Irvine
pp. 247
Plenary Session II
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pp. 255
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pp. 257
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Session 4A: Power Analysis and Low Power Design
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Soroush Abbaspour, University of Southern California
Massoud Pedram, University of Southern California
Payam Heydari, University of California, Irvine
pp. 261
Session 4B: Topics in Device and Interconnect Modeling
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Makram M. Mansour, University of Illinois at Urbana-Champaign
Amit Mehrotra, University of Illinois at Urbana-Champaign
pp. 299
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Session 4C: Techniques for High-Speed Circuits and Module Generation
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Young Jun Lee, Northeastern University
Jong-Jin Lim, Northeastern University
Yong-Bin Kim, Northeastern University
pp. 307
Danica Stefanovic, Swiss Federal Institute of Technology, Electronics Labs; University of Nis
Maher Kayal, Swiss Federal Institute of Technology, Electronics Labs
Marc Pastre, Swiss Federal Institute of Technology, Electronics Labs
Vanco B. Litovski, University of Nis
pp. 313
Makram M. Mansour, University of Illinois at Urbana-Champaign
Mohammad M. Mansour, University of Illinois at Urbana-Champaign
Amit Mehrotra, University of Illinois at Urbana-Champaign
pp. 319
Session 5A: Timing and Noise Issues in Physical Design
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Ming-Fu Hsiao, National Taiwan University
Malgorzata Marek-Sadowska, University of California, Santa Barbara
Sao-Jie Chen, National Taiwan University
pp. 333
Puneet Gupta, UC San Diego
Andrew B. Kahng, UC San Diego
Stefanus Mantik, Cadence Design Systems, Inc.
pp. 339
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Toshiyuki Shibuya, Fujitsu Laboratories LTD.
Rajeev Murgai, Fujitsu Laboratories of America, Inc.
Tadashi Konno, Fujitsu LTD.
Kazuhiro Emi, Fujitsu LSI Technology LTD.
Kaoru Kawamura, Fujitsu Laboratories LTD.
pp. 348
Session 5B: Reliabililty Analysis
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Won-Seok Lee, SAMSUNG Electronics Co., Ltd
Keun-Ho Lee, SAMSUNG Electronics Co., Ltd
Jin-Kyu Park, SAMSUNG Electronics Co., Ltd
Tae-Kyung Kim, SAMSUNG Electronics Co., Ltd
Young-Kwan Park, SAMSUNG Electronics Co., Ltd
Jeong-Taek Kong, SAMSUNG Electronics Co., Ltd
pp. 373
Session 5C: Panel Discussion: Hidden Quality, Crouching Customer-How Much Does the Quality of EDA Tools Impact Electronic Design?
Session 6A: Interconnect Parasitic Effects
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S. Simon Wong, Stanford University
Patrick Yue, Stanford University
Richard Chang, Stanford University
So-Young Kim, Stanford University
Bendik Kleveland, Stanford University
Frank O?Mahony, Stanford University
pp. 389
Session 6B: Design and Measurement Issues in Testing
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Angela Krstic, University of California, Santa Barbara
Jing-Jia Liou, National Tsing Hua University
Kwang-Ting (Tim) Cheng, University of California, Santa Barbara
Li-C. Wang, University of California, Santa Barbara
pp. 438
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pp. 451
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pp. 453
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pp. 455
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