loading...
YAML: A Tool for Hardware Design Visualization and Capture
Madrid, Spain September 20-September 22
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISSS.2000.87402313th International Symposium on Syste ...
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Vivek Sinha, University of California at Irvine
Frederic Doucet, University of California at Irvine
Chuck Siska, University of California at Irvine
Rajesh Gupta, University of California at Irvine
Stan Liao, Synopsys Inc.
Abhijit Ghosh, Synopsys Inc.
Design visualization is an important part of the system design process. In practice, systems are often visualized using a combination of structural and functional entities. In this paper, we describe an approach that helps to capture the structural aspects of a design at a high level of abstraction and enable the system designer to enter designs “schematically” using predefined structural and functional entities conforming to UML notation. The corresponding tool, YAML (Yet Another UML front end) provides support for modeling objects and a range of object relationships that are crucial to real-life embedded system designs. A YAML design entry can then be automatically translated into synthesizable C++ code for simulation and hardware synthesis.
Citation:
Vivek Sinha, Frederic Doucet, Chuck Siska, Rajesh Gupta, Stan Liao, Abhijit Ghosh, "YAML: A Tool for Hardware Design Visualization and Capture," isss, pp.9, 13th International Symposium on System Synthesis (ISSS'00), 2000
Usage of this product signifies your acceptance of the Terms of Use.