loading...
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
Kyoto, Japan October 02-October 04
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISSS.2002.1227154Proceedings of the 15th international ...
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
E. A. de Kock, Philips Research, Eindhoven, The Netherlands
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a structured approach for implementing process networks. We use process networks as re-usable and architecture-independent functional specifications. The method facilitates the cost-driven and constraint-driven source code transformation of process networks into architecture-specific implementations in the form of communicating tasks. We apply the method to implement a JPEG decoding process network in software on a set of MIPS processors. We apply three transformations to optimize synchronization rates and data transfers and to exploit data parallelism for this target architecture. We evaluate the impact of the source code transformations and the performance of the resulting implementations in terms of design time, execution time, and code size. The results show that process networks can be implemented quickly and efficiently on embedded multiprocessor systems.
Index Terms:
code transformation, data parallelism, multiprocessor mapping, process network, system design method, task-level parallelism
Citation:
E. A. de Kock, "Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study," isss, pp.68-73, Proceedings of the 15th international symposium on System Synthesis (ISSS '02), 2002
Usage of this product signifies your acceptance of the Terms of Use.