loading...
Systolic Array Implementation of Block Based Hopfield Neural Network for Pattern Association
Tampa, Florida February 20-February 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183471IEEE Computer Society Annual Symposiu ...
 This Article 
 
PURCHASE ARTICLE: $0
HTML
IEEE Xplore Subscribers
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
ASCII Text
x 
 
Ming-Jung Seow, Hau Ngo, Vijayan Asari, "Systolic Array Implementation of Block Based Hopfield Neural Network for Pattern Association," VLSI, IEEE Computer Society Annual Symposium on, pp. 213, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003.
 
 
BibTex
x
 
@article{ 10.1109/ISVLSI.2003.1183471,
author = {Ming-Jung Seow and Hau Ngo and Vijayan Asari},
title = {Systolic Array Implementation of Block Based Hopfield Neural Network for Pattern Association},
journal ={VLSI, IEEE Computer Society Annual Symposium on},
volume = {0},
year = {2003},
isbn = {0-7695-1904-0},
pages = {213},
doi = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183471},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI, IEEE Computer Society Annual Symposium on
TI - Systolic Array Implementation of Block Based Hopfield Neural Network for Pattern Association
SN - 0-7695-1904-0
SP
EP
A1 - Ming-Jung Seow,
A1 - Hau Ngo,
A1 - Vijayan Asari,
PY - 2003
KW - null
VL - 0
JA - VLSI, IEEE Computer Society Annual Symposium on
ER -
 
Ming-Jung Seow, Old Dominion University
Hau Ngo, Old Dominion University
Vijayan Asari, Old Dominion University
This paper suggests the systolic array implementation of block based Hopfield neural network architecture using completely digital circuits. The design is based on rewriting the energy equation of Hopfield neural network to a systolic (or modular) form. The performance of the proposed architecture is evaluated by applying various binary inputs and it is observed that the network provides massive parallelism and can be extended by cascading identical chips.
Citation:
Ming-Jung Seow, Hau Ngo, Vijayan Asari, "Systolic Array Implementation of Block Based Hopfield Neural Network for Pattern Association," isvlsi, pp.213, IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03), 2003
Usage of this product signifies your acceptance of the Terms of Use.