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An Embedded Core for Sub-Picosecond Timing Measurements
Baltimore, MD, USA October 07-October 10
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2002.1041753International Test Conference 2002 (I ...
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Sassan Tabatabaei, Vector 12 Corp.
Andr? Ivanov, University of British Columbia
The continued market demand for GHz processors and high-capacity communication systems results in an increasing number of low-cost high volume ICs with multi-GHz clocks and/or multi-Gb/s serial communication interfaces. For such devices, timing specifications, e.g., jitter and skew, in the range of few picoseconds (RMS and/or p-p) are common. We describe an embedded core that allows such measurements. The core is small, functionally non-intrusive, and easily scalable for testing multiple circuits and signals on the chip. To reach the required sub-picosecond accuracy, we present a novel measurement and data processing technique, based on noise scaling. The core has a standard low-speed serial interface.
Citation:
Sassan Tabatabaei, Andr? Ivanov, "An Embedded Core for Sub-Picosecond Timing Measurements," itc, pp.129, International Test Conference 2002 (ITC'02), 2002
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