Latch Divergency In Microprocessor Failure Analysis

Charlotte, NC, USA September 30-October 02

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http://doi.ieeecomputersociety.org/10.1109/TEST.2003.1270905

International Test Conference 2003 (I ...

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	ASCII Text	x
	Peter Dahlgren, Paul Dickinson, Ishwar Parulkar, "Latch Divergency In Microprocessor Failure Analysis," Test Conference, International, pp. 755, International Test Conference 2003 (ITC'03), 2003.

	BibTex	x
	@article{ 10.1109/TEST.2003.1270905, author = {Peter Dahlgren and Paul Dickinson and Ishwar Parulkar}, title = {Latch Divergency In Microprocessor Failure Analysis}, journal ={Test Conference, International}, volume = {0}, year = {2003}, issn = {1089-3539}, pages = {755}, doi = {http://doi.ieeecomputersociety.org/10.1109/TEST.2003.1270905}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Test Conference, International TI - Latch Divergency In Microprocessor Failure Analysis SN - 1089-3539 SP EP A1 - Peter Dahlgren, A1 - Paul Dickinson, A1 - Ishwar Parulkar, PY - 2003 KW - null VL - 0 JA - Test Conference, International ER -

Peter Dahlgren, Sun Microsystems, Inc.

Paul Dickinson, Sun Microsystems, Inc.

Ishwar Parulkar, Sun Microsystems, Inc.

This paper presents an approach for analysis of system state differences observable through the scan chain for the debug of functional failures. A novel methodology for Latch Divergence Analysis (LDA) is proposed for creating stable failure signatures and reducing system noise. The methodology and processing flow have been integrated into the normal debug flow for the UltraSPARC^TM family processors and have been successfully applied in numerous debugs in the bring-up of new products.

Citation:

Peter Dahlgren, Paul Dickinson, Ishwar Parulkar, "Latch Divergency In Microprocessor Failure Analysis," itc, pp.755, International Test Conference 2003 (ITC'03), 2003

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