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Simulating Resistive Bridging and Stuck-At Faults
Charlotte, NC, USA September 30-October 02
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/TEST.2003.1271093International Test Conference 2003 (I ...
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Piet Engelke, Albert-Ludwigs-University
Ilia Polian, Albert-Ludwigs-University
Michel Renovell, LIRMM - UMII
Bernd Becker, Albert-Ludwigs-University
We present a simulator for resistive bridging and stuck-at faults. In contrast to earlier work, it is based on electrical equations rather than table look-up, thus exposing more flexibility. For the first time, simulation of sequential circuits is dealt with; reciprocal action of fault effects in current time frame and earlier time frames is elaborated on for different bridge resistances. Experimental results are given for resistive bridging and stuck-at faults in combinational and sequential circuits. Different definitions of fault coverage are listed and quantitative results with respect to all these definitions are given for the first time.
Index Terms:
Keywords: Resistive bridging faults, Resistive stuck-at faults, probabilistic fault coverage, bridging fault simulation
Citation:
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker, "Simulating Resistive Bridging and Stuck-At Faults," itc, pp.1051, International Test Conference 2003 (ITC'03), 2003
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