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Implementation of a Video Transcoder for Embedded System
Las Vegas, Nevada April 28-April 30
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ITCC.2003.1197561International Conference on Informati ...
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Olli Lehtoranta, Petri Kukkala, Timo D. H?m?l?inen, Ville Lappalainen, "Implementation of a Video Transcoder for Embedded System," Information Technology: Coding and Computing, International Conference on, pp. 389, International Conference on Information Technology: Computers and Communications, 2003.
 
 
BibTex
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@article{ 10.1109/ITCC.2003.1197561,
author = {Olli Lehtoranta and Petri Kukkala and Timo D. H?m?l?inen and Ville Lappalainen},
title = {Implementation of a Video Transcoder for Embedded System},
journal ={Information Technology: Coding and Computing, International Conference on},
volume = {0},
year = {2003},
isbn = {0-7695-1916-4},
pages = {389},
doi = {http://doi.ieeecomputersociety.org/10.1109/ITCC.2003.1197561},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Information Technology: Coding and Computing, International Conference on
TI - Implementation of a Video Transcoder for Embedded System
SN - 0-7695-1916-4
SP
EP
A1 - Olli Lehtoranta,
A1 - Petri Kukkala,
A1 - Timo D. H?m?l?inen,
A1 - Ville Lappalainen,
PY - 2003
KW - null
VL - 0
JA - Information Technology: Coding and Computing, International Conference on
ER -
 
Olli Lehtoranta, Tampere University of Technology
Petri Kukkala, Tampere University of Technology
Timo D. H?m?l?inen, Tampere University of Technology
Ville Lappalainen, Nokia Research Center
Implementation of a video ranscoder for error resilient video is described. The video protection is based on two methods using frequency domain partitioning and modified H.263++ data partitioning. Moreover, the transcoder uses multiple data packets to communicate a single video frame to the video decoder. The software- based transcoder is implemented on ARM922T RISC processor embedded in Altera Excalibur EPXA10 chip. Neither of video protection methods requires pixel domain decoding/re-encoding, which substantially reduces complexity of the transcoder. Suitability to embedded systems is demonstrated by evaluating memory consumption and benchmarking the application. The effect of overhead of video protection on rate-distortion performance is analysed. The results show that when modified data partitioning is utilised, a 125 MHz ARM922T is able to process 178 frames/s, if hardware/software co-optimisation and QCIF format are used.
Citation:
Olli Lehtoranta, Petri Kukkala, Timo D. H?m?l?inen, Ville Lappalainen, "Implementation of a Video Transcoder for Embedded System," itcc, pp.389, International Conference on Information Technology: Computers and Communications, 2003
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