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Dual-Processor Parallelisation of Symbolic Probabilistic Model Checking
Volendam, The Netherlands October 04-October 08
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MASCOT.2004.134818912th IEEE International Symposium on ...
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Marta Kwiatkowska, University of Birmingham
David Parker, University of Birmingham
Yi Zhang, University of Birmingham
Rashid Mehmood, University of Cambridge
In this paper, we describe the dual-processor parallelisation of a symbolic (BDD-based) implementation of probabilistic model checking. We use multi-terminal BDDs, which allow a compact representation of large, structured Markov chains. We show that they also provide a convenient block decomposition of the Markov chain which we use to implement a parallelised version of the Gauss-Seidel iterative method. We provide experimental results on a range of case studies to illustrate the effectiveness of the technique, observing an average speed-up of 1.8 with two processors. Furthermore, we present an optimisation for our method based on preconditioning.
Citation:
Marta Kwiatkowska, David Parker, Yi Zhang, Rashid Mehmood, "Dual-Processor Parallelisation of Symbolic Probabilistic Model Checking," mascots, pp.123-130, 12th IEEE International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems (MASCOTS'04), 2004
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