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Design Techniques for Embedded EEPROM Memories in Portable ASIC and ASSP Solutions
San Jose, California August 07-August 08
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTDT.2000.8686142000 IEEE International Workshop on M ...
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Jean Michel Daga, ATMEL ROUSSETRANCE
Caroline Papaix, ATMEL ROUSSETRANCE
Marc Merandat, ATMEL ROUSSETRANCE
Stephane Ricard, ATMEL ROUSSETRANCE
Giuseppe Medulla, ATMEL ROUSSETRANCE
Jeanine Guichaoua, ATMEL ROUSSETRANCE
Daniel Auvergne, Montpellier II University
Design techniques for embedded EEPROM memories working under a wide supply voltage range are described. First, a current controlled ring oscillator for stable programming pulse generation has been developed. For supply voltage, values ranging from 2v to 3.5v, in the [-40?C - 85?C] industrial temperature range, less than 30% of oscillation period variation have been measured. Moreover, this oscillator can be completely turned off in stand-by mode for power saving concern. Techniques for read optimization under the constraints of portable systems are also addressed. First, the advantage of using two oxide thickness advanced process for logic delay optimization of EEPROM memories is evaluated, and the gain obtained using the ATMEL 56.8K mixed memory, 0.35 ?m digital process is reported. Then, a word line boosting technique used to amplify the available memory cell current is described. Thanks to the boost, current sensing delay remains acceptable even for supply voltage values under 2v. In addition, address transition detection (ATD) based cut off circuitry is used to minimize the power consumption at higher values of the supply voltage. A 32kx16, 1.8v-3.3v embedded memories has been designed using the proposed techniques. 170ns typical access time (290ns in process and temperature worst case) has been simulated at 1.8v, with an average current consumption lower than 3mA at 3.3v when reading at 3.3Mhz frequency.
Citation:
Jean Michel Daga, Caroline Papaix, Marc Merandat, Stephane Ricard, Giuseppe Medulla, Jeanine Guichaoua, Daniel Auvergne, "Design Techniques for Embedded EEPROM Memories in Portable ASIC and ASSP Solutions," mtdt, pp.39, 2000 IEEE International Workshop on Memory Technology, Design and Testing (MTDT'00), 2000
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