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Equivalence Checking a 256MB SDRAM
San Jose, California August 06-August 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTDT.2001.945234International Workshop on Memory Tech ...
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Simon Napper, Dian Yang, "Equivalence Checking a 256MB SDRAM," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 0085, International Workshop on Memory Technology, Design, and Testing (MTDT'01), 2001.
 
 
BibTex
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@article{ 10.1109/MTDT.2001.945234,
author = {Simon Napper and Dian Yang},
title = {Equivalence Checking a 256MB SDRAM},
journal ={Memory Technology, Design and Testin, IEEE International Workshop on},
volume = {0},
year = {2001},
isbn = {0-7695-1242-9},
pages = {0085},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2001.945234},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Memory Technology, Design and Testin, IEEE International Workshop on
TI - Equivalence Checking a 256MB SDRAM
SN - 0-7695-1242-9
SP
EP
A1 - Simon Napper,
A1 - Dian Yang,
PY - 2001
VL - 0
JA - Memory Technology, Design and Testin, IEEE International Workshop on
ER -
 
Simon Napper, InnoLogic Systems Inc.
Dian Yang, InnoLogic Systems Inc.
Abstract: This paper outlines how symbolic simulation was used to verify both data and sequence integrity in a 256MB SDRAM. The initial step is to examine the underlying equivalence-checking engine and then explain how it is applied to SDRAM verification. SDRAM verification is interesting in that it captures both memory and sequence verification. The data integrity verification is valid for any type of memory structure and the sequence integrity can be extended to many types of sequenced machines.
Citation:
Simon Napper, Dian Yang, "Equivalence Checking a 256MB SDRAM," mtdt, pp.0085, International Workshop on Memory Technology, Design, and Testing (MTDT'01), 2001
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