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Testing Carry Logic Modules of SRAM-based FPGAs
San Jose, California August 06-August 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTDT.2001.945235International Workshop on Memory Tech ...
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Xiaoling Sun, Jian Xu, Pieter Trouborst, "Testing Carry Logic Modules of SRAM-based FPGAs," Memory Technology, Design and Testin, IEEE International Workshop on, pp. 0091, International Workshop on Memory Technology, Design, and Testing (MTDT'01), 2001.
 
 
BibTex
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@article{ 10.1109/MTDT.2001.945235,
author = {Xiaoling Sun and Jian Xu and Pieter Trouborst},
title = {Testing Carry Logic Modules of SRAM-based FPGAs},
journal ={Memory Technology, Design and Testin, IEEE International Workshop on},
volume = {0},
year = {2001},
isbn = {0-7695-1242-9},
pages = {0091},
doi = {http://doi.ieeecomputersociety.org/10.1109/MTDT.2001.945235},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Memory Technology, Design and Testin, IEEE International Workshop on
TI - Testing Carry Logic Modules of SRAM-based FPGAs
SN - 0-7695-1242-9
SP
EP
A1 - Xiaoling Sun,
A1 - Jian Xu,
A1 - Pieter Trouborst,
PY - 2001
VL - 0
JA - Memory Technology, Design and Testin, IEEE International Workshop on
ER -
 
Xiaoling Sun, University of Alberta
Jian Xu, University of Alberta
Pieter Trouborst, Nortel Networks
Abstract: The carry logic module (CLM) is an integral part of a configurable logic block (CLB) in a Xilinx XC4000 field programmable gate array (FPGA). This paper addresses the testing issues of a CLM for the first time. The integrity of a CLM is validated by the integrity of all its components. It has been found that the minimum numbers of CLM test configurations (TCs) under single stuck-at, multiple stuck-at, and universal fault models are six, seven and eight respectively. A set of selection criteria was proposed to obtain the "best" of eight TCs, each contains a subset of six and seven TCs for the two stuck-at fault models. These CLM TCs can be extended to include the test of the whole CLB.
Citation:
Xiaoling Sun, Jian Xu, Pieter Trouborst, "Testing Carry Logic Modules of SRAM-based FPGAs," mtdt, pp.0091, International Workshop on Memory Technology, Design, and Testing (MTDT'01), 2001
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