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Fault Tolerant Insertion and Verification: A Case Study
Isle of Bendor, France July 10-July 12
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MTDT.2002.1029762The 2002 IEEE International Workshop ...
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Alberto Manzone, Centro Ricerche FIAT
Diego De Costantini, Centro Ricerche FIAT
The particular circuit structures that allow the building of a Fault Tolerant (FT) circuit have been extensively studied in the past, but currently there is a lack of CAD support in the design and evaluation of FT circuits. The aim of the AMATISTA European project (IST project 11762) is to develop a set of tools devoted to the design of FT digital circuits. The toolset is composed of: an automatic insertion tool and a simulation tool to validate the FT design. This paper is a case study describing how this set of FTI (Fault Tolerant Insertion) and FTV (Fault Tolerant Verification) tools have been used to increase the reliability in a typical automotive application.
Citation:
Alberto Manzone, Diego De Costantini, "Fault Tolerant Insertion and Verification: A Case Study," mtdt, pp.44, The 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT 2002), 2002
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