Performance comparison of real-time architectures using simulation

Tokyo, Japan October 25-October 27

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http://doi.ieeecomputersociety.org/10.1109/RTCSA.1995.528765

Second International Workshop on Real ...

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	ASCII Text	x
	Heejo Lee, K. Toda, Jong Kim, K. Nishida, E. Takahashi, Y. Yamaguchi, "Performance comparison of real-time architectures using simulation," Real-Time Computing Systems and Applications, International Workshop on, pp. 150, Second International Workshop on Real-Time Computing Systems and Applications (RTCSA'95), 1995.

	BibTex	x
	@article{ 10.1109/RTCSA.1995.528765, author = {Heejo Lee and K. Toda and Jong Kim and K. Nishida and E. Takahashi and Y. Yamaguchi}, title = {Performance comparison of real-time architectures using simulation}, journal ={Real-Time Computing Systems and Applications, International Workshop on}, volume = {0}, year = {1995}, isbn = {0-8186-7106-8}, pages = {150}, doi = {http://doi.ieeecomputersociety.org/10.1109/RTCSA.1995.528765}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Real-Time Computing Systems and Applications, International Workshop on TI - Performance comparison of real-time architectures using simulation SN - 0-8186-7106-8 SP EP A1 - Heejo Lee, A1 - K. Toda, A1 - Jong Kim, A1 - K. Nishida, A1 - E. Takahashi, A1 - Y. Yamaguchi, PY - 1995 KW - parallel processing; distributed processing; real-time systems; performance evaluation; discrete event simulation; performance comparison; real-time architectures; simulation; discrete event-driven; task-based simulator; parallel computer systems; distributed real-time systems; processor; network architectures; scheduling policy; priority-based communication; dedicated processor; interrupt handling; schedulability; predictability; performance prediction VL - 0 JA - Real-Time Computing Systems and Applications, International Workshop on ER -

Heejo Lee, Dept. of Comput. Sci. & Eng., Pohang Inst. of Sci. & Technol., South Korea

K. Toda, Dept. of Comput. Sci. & Eng., Pohang Inst. of Sci. & Technol., South Korea

Jong Kim, Dept. of Comput. Sci. & Eng., Pohang Inst. of Sci. & Technol., South Korea

K. Nishida, Dept. of Comput. Sci. & Eng., Pohang Inst. of Sci. & Technol., South Korea

E. Takahashi, Dept. of Comput. Sci. & Eng., Pohang Inst. of Sci. & Technol., South Korea

Y. Yamaguchi, Dept. of Comput. Sci. & Eng., Pohang Inst. of Sci. & Technol., South Korea

This paper presents a performance comparison of real-time system architectures. A discrete event-driven, task-based simulator is developed for evaluating the performance of parallel and distributed real-time systems. Real-time system components such as processor, network architectures, and scheduling policy are included in the simulator. Simulation results show that priority-based communication and scheduling are more suitable for real-time systems than FIFO-based. The strategy of having a dedicated processor, which produces no effect on task execution by scheduling and packet/interrupt handling, is proven to enhance schedulability and predictability. This paper suggests a method for finding an appropriate real-time architecture for users having real-time requirements through the performance prediction of real-time systems.

Index Terms:

parallel processing; distributed processing; real-time systems; performance evaluation; discrete event simulation; performance comparison; real-time architectures; simulation; discrete event-driven; task-based simulator; parallel computer systems; distributed real-time systems; processor; network architectures; scheduling policy; priority-based communication; dedicated processor; interrupt handling; schedulability; predictability; performance prediction

Citation:

Heejo Lee, K. Toda, Jong Kim, K. Nishida, E. Takahashi, Y. Yamaguchi, "Performance comparison of real-time architectures using simulation," rtcsa, pp.150, Second International Workshop on Real-Time Computing Systems and Applications (RTCSA'95), 1995

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