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DSPTune: A Performance Evaluation Toolset for the SHARC Signal Processor
Washington, D.C. April 16-April 22
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/SIMSYM.2000.84490033rd Annual Simulation Symposium
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Suleyman Sair, Northeastern University
Guiseppe Olivadoti, Northeastern University
David Kaeli, Northeastern University
Jose Fridman, Analog Devices
Performance tuning in the embedded systems domain poses a new set of challenges for software and hardware designers. Techniques proven to work for general-purpose architectures cannot always be directly applied to the signal processor environment. Program analysis and simulation tools have been shown to be invaluable in the analysis of general-purpose microprocessors. We anticipate that similar tools will be needed to analyze the characteristics of signal processing architectures and applications as well. To meet this need, we have developed DSPTune, a program analysis toolset for the Analog Devices' SHARC DSP. This paper describes our toolset, and provides examples of its use.
Citation:
Suleyman Sair, Guiseppe Olivadoti, David Kaeli, Jose Fridman, "DSPTune: A Performance Evaluation Toolset for the SHARC Signal Processor," ss, pp.51, 33rd Annual Simulation Symposium, 2000
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