Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts

Bangalore, India January 07-January 11

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2002.994964

ASP-DAC/VLSI Design 2002

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Yukiko Kubo Articles by Shigetoshi Nakatake Articles by Yoji Kajitani Articles by Masahiro Kawakita

	ASCII Text	x
	Yukiko Kubo, Shigetoshi Nakatake, Yoji Kajitani, Masahiro Kawakita, "Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts," VLSI Design, International Conference on, pp. 467, ASP-DAC/VLSI Design 2002, 2002.

	BibTex	x
	@article{ 10.1109/ASPDAC.2002.994964, author = {Yukiko Kubo and Shigetoshi Nakatake and Yoji Kajitani and Masahiro Kawakita}, title = {Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2002}, isbn = {0-7695-1441-3}, pages = {467}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2002.994964}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts SN - 0-7695-1441-3 SP EP A1 - Yukiko Kubo, A1 - Shigetoshi Nakatake, A1 - Yoji Kajitani, A1 - Masahiro Kawakita, PY - 2002 KW - analog design KW - mixed signal design KW - placement KW - shape-based layout KW - sequence-pair VL - 0 JA - VLSI Design, International Conference on ER -

Yukiko Kubo, The University of Kitakyushu

Shigetoshi Nakatake, The University of Kitakyushu

Yoji Kajitani, The University of Kitakyushu

Masahiro Kawakita, Toshiba Corp.

Our target is automation of analog circuit's layout, which is a bottleneck in mixed-signal's design. We formulate the layout explicitly considering manufacturing process, and propose an algorithm that consists of simultaneous expression and optimization of placement and routing. The key is that all the cells and wires are represented by rectangles. The algorithm is combined into a commercial tool, and the performance convinced us that the utilization shortens the design time.

Index Terms:

analog design, mixed signal design, placement, shape-based layout, sequence-pair

Citation:

Yukiko Kubo, Shigetoshi Nakatake, Yoji Kajitani, Masahiro Kawakita, "Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts," vlsid, pp.467, ASP-DAC/VLSI Design 2002, 2002

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.