Sandeep K. Shukla, Jean Pierre Talpin, Stephen A. Edwards, Rajesh K. Gupta,
"High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap,"
VLSI Design, International Conference on, pp. 9, 16th International Conference on VLSI Design, 2003.
BibTex
x
@article{
10.1109/ICVD.2003.1183104, author = {Sandeep K. Shukla and Jean Pierre Talpin and Stephen A. Edwards and Rajesh K. Gupta}, title = {High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2003}, issn = {1063-9667}, pages = {9}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.1183104}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }
RefWorks Procite/RefMan/Endnote
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TY - CONF JO - VLSI Design, International Conference on TI - High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap SN - 1063-9667 SP EP A1 - Sandeep K. Shukla, A1 - Jean Pierre Talpin, A1 - Stephen A. Edwards, A1 - Rajesh K. Gupta, PY - 2003 KW - null VL - 0 JA - VLSI Design, International Conference on ER -
Sandeep K. Shukla, Jean Pierre Talpin, Stephen A. Edwards, Rajesh K. Gupta, "High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap," vlsid, pp.9, 16th International Conference on VLSI Design, 2003
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