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An Efficient Practical Heuristic For Good Ratio-Cut Partitioning
New Delhi, India January 04-January 08
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2003.118311616th International Conference on VLSI ...
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Sachin B. Patkar, Indian Institute of Technology
H. Narayanan, Indian Institute of Technology
We present an efficient heuristic for finding good bipartitions of the vertex set of a graph in the sense of the well-known measure of ratioCut [2, 8] (essentially the ratio between weight of cut edges and the product of weights of the nodesets of the bipartition). The widely accepted ratioCut bipartitioning algorithm of Wei and Cheng [13] is similar in spirit to the Fiduccia-Mattheyeses [9] algorithm (F-M algorithm). Our approach makes use of F-M algorithm as the first phase that takes in as an input, random bipartitions. In the later phase of our algorithm we make use of a new coarsening strategy and follow it up with a submodular function optimization algorithm on the coarsened graph. We also present the comparison of results of this approach applied to benchmark circuits with the well-established algorithms such as the Wei-Cheng algorithm [13] for ratioCut bipartitioning and pmetis of Metis [7] package. The comparative study not only shows that this new approach indeed produces good quality ratioCut bipartitions, but also the fact that this approach has the potential of finding a large number of such good partitions in comparison with other approaches. The key subroutine in our heuristic strategies is based on the recent finding published in [12] about the role of submodular functions in designing new heuristics and approximate algorithms to some NP-hard problems.
Citation:
Sachin B. Patkar, H. Narayanan, "An Efficient Practical Heuristic For Good Ratio-Cut Partitioning," vlsid, pp.64, 16th International Conference on VLSI Design, 2003
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