Tree height reduction helps in minimizing the critical path delay and area in datapath rich designs during synthesis. We introduce in this paper, the necessary conditions to identify height reducible arithmetic expressions and three graph transformations that make Tree Height Reduction more efficient: (a) Bit-width matching - a technique in which input signals that match in their bit-widths are grouped together so that smaller width arithmetic nodes are created in the graph. (b) Carry / Borrow Optimization - a graph transformation by which an optimum number of single bit inputs are distributed as carry / borrow to the add / subtract nodes in the graph. (c) Constant grouping - a graph transformation in which constant inputs are grouped together to form a sub-tree of constants. Experiments on industrial designs with these graph transformations coupled with Tree Height Reduction have shown significant improvement in critical path delay and area.