Using computer-aided circuit simulation, the speed of RTD-based bistable circuits has been evaluated in terms of device parameters, such as the transistor?s f_T and f_max, and circuit parameters, such as sizing. Two topologies studied in this work are: 1) monostable-to-bistable transition logic element (MOBILE), and 2) quantum bistable logic circuit (QBL). The transistors studied in this paper are: 1) hetero-junction bipolar transistors (HBTs), and 2) high electron mobility transistors (HEMTs). Results indicate that, among the four configurations, the MOBILE circuit using HEMTs is the fastest. This circuit, however, is also the most likely to suffer significant performance reduction due to parasitic loads and variation of device characteristics.