Cellular Automata Based Test Structures with Logic Folding

Kolkata, India January 03-January 07

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http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.63

18th International Conference on VLSI ...

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	Biplab K. Sikdar, Sukanta Das, Samir Roy, Niloy Ganguly, Debesh K. Das, "Cellular Automata Based Test Structures with Logic Folding," VLSI Design, International Conference on, pp. 71-74, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.63, author = {Biplab K. Sikdar and Sukanta Das and Samir Roy and Niloy Ganguly and Debesh K. Das}, title = {Cellular Automata Based Test Structures with Logic Folding}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {71-74}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.63}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Cellular Automata Based Test Structures with Logic Folding SN - 1063-9667 SP71 EP74 A1 - Biplab K. Sikdar, A1 - Sukanta Das, A1 - Samir Roy, A1 - Niloy Ganguly, A1 - Debesh K. Das, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Biplab K. Sikdar, Bengal Engineering and Science University

Sukanta Das, Bengal Engineering and Science University

Samir Roy, Kalyani Government Engineering College

Niloy Ganguly, Technical University Dresden

Debesh K. Das, Jadavpur University

This paper presents an efficient test solution for VLSI circuits. The test structure is designed with GF(2^P) CA. The introduction to an innovative scheme of logic folding optimizes the cost of test logic that can not be feasible with the flattened structure of GF(2) CA/LFSR.

Citation:

Biplab K. Sikdar, Sukanta Das, Samir Roy, Niloy Ganguly, Debesh K. Das, "Cellular Automata Based Test Structures with Logic Folding," vlsid, pp.71-74, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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