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A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Kolkata, India January 03-January 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.1218th International Conference on VLSI ...
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Praveen Bhojwani, Rabi Mahapatra, Eun Jung Kim, Thomas Chen, "A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems," VLSI Design, International Conference on, pp. 124-129, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.
 
 
BibTex
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@article{ 10.1109/ICVD.2005.12,
author = {Praveen Bhojwani and Rabi Mahapatra and Eun Jung Kim and Thomas Chen},
title = {A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems},
journal ={VLSI Design, International Conference on},
volume = {0},
year = {2005},
issn = {1063-9667},
pages = {124-129},
doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.12},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Design, International Conference on
TI - A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
SN - 1063-9667
SP124
EP129
A1 - Praveen Bhojwani,
A1 - Rabi Mahapatra,
A1 - Eun Jung Kim,
A1 - Thomas Chen,
PY - 2005
KW - null
VL - 0
JA - VLSI Design, International Conference on
ER -
 
Praveen Bhojwani, Texas A&M University
Rabi Mahapatra, Texas A&M University
Eun Jung Kim, Texas A&M University
Thomas Chen, IBM Microelectronics
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system components and routing of system communication affect system performance and power consumption. This research provides a heuristic to determine the neighborhood configuration for each component. By controlling the communication bandwidth allocation, simulation results with synthetic and real workloads indicate that our heuristic is able to control the peak power consumption, but at cost of throughput degradation.
Citation:
Praveen Bhojwani, Rabi Mahapatra, Eun Jung Kim, Thomas Chen, "A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems," vlsid, pp.124-129, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005
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