We address the problem of deriving exact Finite State Machines (FSMs) from SystemC descriptions. This is useful in frequently-occurring design scenarios where the cycle-by-cycle I/O behavior of an application has to be preserved during behavioral synthesis (cycle-fixed mode). We present an algorithm for deriving the FSM in the presence of complex and arbitrarily nested control structures in the specifi- cation, thereby overcoming certain key limitations of state-of-the-art behavioral synthesis research.