Reducing Leakage with Mixed-V

Reducing Leakage with Mixed-V_th (MVT)

Kolkata, India January 03-January 07

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http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.147

18th International Conference on VLSI ...

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	ASCII Text	x
	Frank Sill, Frank Grassert, Dirk Timmermann, "Reducing Leakage with Mixed-V_th (MVT)," VLSI Design, International Conference on, pp. 874-877, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005.

	BibTex	x
	@article{ 10.1109/ICVD.2005.147, author = {Frank Sill and Frank Grassert and Dirk Timmermann}, title = {Reducing Leakage with Mixed-V_th (MVT)}, journal ={VLSI Design, International Conference on}, volume = {0}, year = {2005}, issn = {1063-9667}, pages = {874-877}, doi = {http://doi.ieeecomputersociety.org/10.1109/ICVD.2005.147}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Design, International Conference on TI - Reducing Leakage with Mixed-V_th (MVT) SN - 1063-9667 SP874 EP877 A1 - Frank Sill, A1 - Frank Grassert, A1 - Dirk Timmermann, PY - 2005 KW - null VL - 0 JA - VLSI Design, International Conference on ER -

Frank Sill, University of Rostock

Frank Grassert, University of Rostock

Dirk Timmermann, University of Rostock

We present a new method for assignment of devices with different V_th in a double-V_th-process, whereas leakage is reduced and performance increases or is constant. A mixed-V_th gate type is developed, which renders new masks unnecessary. As compared with known methods, our approach achieves an additional leakage reduction of 25% while leakage reduction in raw designs is average 65%.

Citation:

Frank Sill, Frank Grassert, Dirk Timmermann, "Reducing Leakage with Mixed-V_th (MVT)," vlsid, pp.874-877, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID'05), 2005

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