loading...
Fault coverage analysis of RAM test algorithms
Princeton, New Jersey April 30-May 03
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.51264213th IEEE VLSI Test Symposium (VTS'95)
 This Article 
 
Buy PURCHASE ARTICLE: $19
PDF
HTML
Buy IEEE Xplore Subscribers
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
ASCII Text
x 
 
M. Riedel, J. Rajski, "Fault coverage analysis of RAM test algorithms," VLSI Test Symposium, IEEE, pp. 0227, 13th IEEE VLSI Test Symposium (VTS'95), 1995.
 
 
BibTex
x
 
@article{ 10.1109/VTEST.1995.512642,
author = {M. Riedel and J. Rajski},
title = {Fault coverage analysis of RAM test algorithms},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {1995},
isbn = {0-8186-7000-2},
pages = {0227},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.512642},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Fault coverage analysis of RAM test algorithms
SN - 0-8186-7000-2
SP
EP
A1 - M. Riedel,
A1 - J. Rajski,
PY - 1995
KW - random-access storage; integrated circuit testing; integrated memory circuits; fault diagnosis; RAM test algorithms; fault coverage; flexible software analysis program; arbitrary test sequences; coverage statistics; functional cell-array faults; fault state transition conditions; representative fault classes; test algorithms; semiconductor memories
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
M. Riedel, MACS Lab., McGill Univ., Montreal, Que., Canada
J. Rajski, MACS Lab., McGill Univ., Montreal, Que., Canada
Abstract: A methodology for evaluating the fault coverage of RAM test algorithms is proposed and the architecture of a flexible software analysis program is described. The analysis, performed for arbitrary test sequences, provides a comprehensive set of coverage statistics for functional cell-array faults. An overview of the analysis capabilities of the program is given, the fault state transition conditions for several representative fault classes are specified, and coverage analyses results for a variety of test algorithms are presented.
Index Terms:
random-access storage; integrated circuit testing; integrated memory circuits; fault diagnosis; RAM test algorithms; fault coverage; flexible software analysis program; arbitrary test sequences; coverage statistics; functional cell-array faults; fault state transition conditions; representative fault classes; test algorithms; semiconductor memories
Citation:
M. Riedel, J. Rajski, "Fault coverage analysis of RAM test algorithms," vts, pp.0227, 13th IEEE VLSI Test Symposium (VTS'95), 1995
Usage of this product signifies your acceptance of the Terms of Use.