Diagnosis of scan path failures

Princeton, New Jersey April 30-May 03

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http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.512645

13th IEEE VLSI Test Symposium (VTS'95)

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	ASCII Text	x
	S. Edirisooriya, G. Edirisooriya, "Diagnosis of scan path failures," VLSI Test Symposium, IEEE, pp. 0250, 13th IEEE VLSI Test Symposium (VTS'95), 1995.

	BibTex	x
	@article{ 10.1109/VTEST.1995.512645, author = {S. Edirisooriya and G. Edirisooriya}, title = {Diagnosis of scan path failures}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {1995}, isbn = {0-8186-7000-2}, pages = {0250}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1995.512645}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - VLSI Test Symposium, IEEE TI - Diagnosis of scan path failures SN - 0-8186-7000-2 SP EP A1 - S. Edirisooriya, A1 - G. Edirisooriya, PY - 1995 KW - fault diagnosis; logic testing; integrated circuit testing; integrated logic circuits; design for testability; combinational circuits; scan path failures; scan based diagnostic schemes; faulty circuits; logic circuitry; scan chain fault diagnosis VL - 0 JA - VLSI Test Symposium, IEEE ER -

S. Edirisooriya, Motorola Comput. Group, USA

G. Edirisooriya, Motorola Comput. Group, USA

Abstract: Scan based diagnostic schemes are used to diagnose faults in faulty circuits. Such techniques assume that the scan path itself is fault-free. However, the logic circuitry associated with the scan chain may occupy nearly 30% of a chip area and hence warrants consideration during fault diagnosis. In this work we propose a simple extension to the scan chain to diagnose faults in scan chains.

Index Terms:

fault diagnosis; logic testing; integrated circuit testing; integrated logic circuits; design for testability; combinational circuits; scan path failures; scan based diagnostic schemes; faulty circuits; logic circuitry; scan chain fault diagnosis

Citation:

S. Edirisooriya, G. Edirisooriya, "Diagnosis of scan path failures," vts, pp.0250, 13th IEEE VLSI Test Symposium (VTS'95), 1995

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