H. Yotsuyanagi, K. Kinoshita,
"8.4 Undetectable Fault Removal of Sequential Circuits Based on Unreachable States,"
VLSI Test Symposium, IEEE, pp. 176, 16th IEEE VLSI Test Symposium, 1998.
BibTex
x
@article{
10.1109/VTEST.1998.670866, author = {H. Yotsuyanagi and K. Kinoshita}, title = {8.4 Undetectable Fault Removal of Sequential Circuits Based on Unreachable States}, journal ={VLSI Test Symposium, IEEE}, volume = {0}, year = {1998}, issn = {1093-0167}, pages = {176}, doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1998.670866}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }
RefWorks Procite/RefMan/Endnote
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TY - CONF JO - VLSI Test Symposium, IEEE TI - 8.4 Undetectable Fault Removal of Sequential Circuits Based on Unreachable States SN - 1093-0167 SP EP A1 - H. Yotsuyanagi, A1 - K. Kinoshita, PY - 1998 VL - 0 JA - VLSI Test Symposium, IEEE ER -
H. Yotsuyanagi, K. Kinoshita, "8.4 Undetectable Fault Removal of Sequential Circuits Based on Unreachable States," vts, pp.176, 16th IEEE VLSI Test Symposium, 1998