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Specification Back-Propagation and Its Application to DC Fault Simulation for Analog/Mixed-Signal Circuits
San Diego, California April 26-April 30
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.1999.7666691999 17TH IEEE VLSI Test Symposium
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Jiun-Lang Huang, University of California at Santa Barbara
Chen-Yang Pan, University of California at Santa Barbara
Kwang-Ting Cheng, University of California at Santa Barbara
In this paper we present the specification back-propagation technique which enables one to derive the constraint of an internal functional block with respect to a given DC specification for an analog/mixed-signal system. Based on this technique, we implement an efficient fault simulator which reduces the required efforts by (1) removing undetectable faults from the fault list, and (2) performing fault simulation only locally for the faulty block. Simulation results on an industrial design show a speedup factor of 7.2 with 98% correct classification of detected and undetected faults as compared with full-chip DC fault simulation.
Citation:
Jiun-Lang Huang, Chen-Yang Pan, Kwang-Ting Cheng, "Specification Back-Propagation and Its Application to DC Fault Simulation for Analog/Mixed-Signal Circuits," vts, pp.220, 1999 17TH IEEE VLSI Test Symposium, 1999
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