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An Efficient BIST Method for Small Buffers
San Diego, California April 26-April 30
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.1999.7666721999 17TH IEEE VLSI Test Symposium
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In this work, we propose a new built-in self-testing (BIST) method that is able to concurrently test a set of spatially distributed embedded-memory modules with different sizes. By allowing some redundant read/write operations for small modules, we develop a new march algorithm, called RSMarch, that can concurrently test all memory modules with the same fault coverage as if each module is tested individually. We also show that this method requires only one simple BIST controller and one test data line for all modules. Thus the new method has the advantages of short test time, high fault coverage and low area overhead.
Citation:
W.B. Jone, D.C. Huang, S.C. Wu, K.J. Lee, "An Efficient BIST Method for Small Buffers," vts, pp.246, 1999 17TH IEEE VLSI Test Symposium, 1999
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