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A Test Point Insertion Algorithm for Mixed-Signal Circuits
San Diego, California April 26-April 30
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.1999.7666821999 17TH IEEE VLSI Test Symposium
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Jinyan Zhang, Sam Huynh, Mani Soma, "A Test Point Insertion Algorithm for Mixed-Signal Circuits," VLSI Test Symposium, IEEE, pp. 319, 1999 17TH IEEE VLSI Test Symposium, 1999.
 
 
BibTex
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@article{ 10.1109/VTEST.1999.766682,
author = {Jinyan Zhang and Sam Huynh and Mani Soma},
title = {A Test Point Insertion Algorithm for Mixed-Signal Circuits},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {1999},
issn = {1093-0167},
pages = {319},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTEST.1999.766682},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - VLSI Test Symposium, IEEE
TI - A Test Point Insertion Algorithm for Mixed-Signal Circuits
SN - 1093-0167
SP
EP
A1 - Jinyan Zhang,
A1 - Sam Huynh,
A1 - Mani Soma,
PY - 1999
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
Jinyan Zhang, University of Washington
Sam Huynh, University of Washington
Mani Soma, University of Washington
This paper presents an algorithm based on testability measurement for test point nsertion of mixed-signal circuits. Two transfer function models compatible with analog models are proposed: one is for digital devices and the other is for A/D interface components. An industry power supply circuit and a common A/D converter circuit are used to validate our approaches.
Citation:
Jinyan Zhang, Sam Huynh, Mani Soma, "A Test Point Insertion Algorithm for Mixed-Signal Circuits," vts, pp.319, 1999 17TH IEEE VLSI Test Symposium, 1999
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