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Test Selection Based on High Level Fault Simulation for Mixed-Signal Systems
Montreal, Canada April 30-May 04
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTEST.2000.84383918th IEEE VLSI Test Symposium (VTS'00)
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Sule Ozev, University of California at San Diego
Alex Orailoglu, University of California at San Diego
Mixed-signal design and test tools are failing to keep apace with the increasing necessity for design exploration at the early stages. We outline a methodology and toolset to enable test selection at the early design stages by providing a high-level fault simulator and associated block-level modeling and traversal capabilities. Experimental results show that the outlined methodology provides superior fault simulation speed-ups while helping to minimize the test time for a mixed-signal receiver system.
Citation:
Sule Ozev, Alex Orailoglu, "Test Selection Based on High Level Fault Simulation for Mixed-Signal Systems," vts, pp.149, 18th IEEE VLSI Test Symposium (VTS'00), 2000
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