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Early Error Detection in Systems-on-Chip for Fault-Tolerance and At-Speed Debugging
Marina Del Rey, CA March 29-April 03
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VTS.2001.92343719th IEEE VLSI Test Symposium
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E.S. Sogomonyan, A. Morosov, J. Rzeha, M. Gossel, A. Singh, "Early Error Detection in Systems-on-Chip for Fault-Tolerance and At-Speed Debugging," VLSI Test Symposium, IEEE, pp. 0184, 19th IEEE VLSI Test Symposium, 2001.
 
 
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@article{ 10.1109/VTS.2001.923437,
author = {E.S. Sogomonyan and A. Morosov and J. Rzeha and M. Gossel and A. Singh},
title = {Early Error Detection in Systems-on-Chip for Fault-Tolerance and At-Speed Debugging},
journal ={VLSI Test Symposium, IEEE},
volume = {0},
year = {2001},
isbn = {0-7695-1122-8},
pages = {0184},
doi = {http://doi.ieeecomputersociety.org/10.1109/VTS.2001.923437},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - VLSI Test Symposium, IEEE
TI - Early Error Detection in Systems-on-Chip for Fault-Tolerance and At-Speed Debugging
SN - 0-7695-1122-8
SP
EP
A1 - E.S. Sogomonyan,
A1 - A. Morosov,
A1 - J. Rzeha,
A1 - M. Gossel,
A1 - A. Singh,
PY - 2001
VL - 0
JA - VLSI Test Symposium, IEEE
ER -
 
E.S. Sogomonyan, Russian Academy of Science
A. Morosov, Potsdam University
J. Rzeha, Potsdam University
M. Gossel, Potsdam University
A. Singh, Auburn University
In this paper we propose1 a new method for the design of duplex fault-tolerant systems with early error detection and high availability. All the scannable memory elements (Flip-Flops) of the duplicated system are implemented as multi-mode memory elements according to [9] allowing during normal operation to accumulate a signature of its states in its scan-paths. By continously comparing a 1-bit sequence of the compacted scan-out outputs of the accumulated signatures of the duplicated systems an error can be already detected and a recovery procedure started before an erroneous result appears at the system outputs when a computations is completed. The accumulation of a signature during normal operation can also be used for debugging at-speed. For this application the system need not be duplicated.
Citation:
E.S. Sogomonyan, A. Morosov, J. Rzeha, M. Gossel, A. Singh, "Early Error Detection in Systems-on-Chip for Fault-Tolerance and At-Speed Debugging," vts, pp.0184, 19th IEEE VLSI Test Symposium, 2001
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